CFP: DTVCS 2008 - Design, Testing and Formal Verification Techniques for Integrated Circuits and Systems
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CFP: DTVCS 2008 - Design, Testing and Formal Verification Techniques for Integrated Circuits and Systems         


Author: ss.dtvcs
Date: Feb 14, 2008 09:56

Apologies for any multiple copies received. We would appreciate it if
you could distribute
the following call for papers to any relevant mailing lists you know
of.

CALL FOR PAPERS
============================================================================
Special Session: Design, Testing and Formal Verification Techniques
for Integrated Circuits and Systems

DTVCS 2008

August 18-20, 2008 (Kailua-Kona, Hawaii, USA)
http://digilander.libero.it/systemcfl/dtvcs
=============================================================================

Special Session in the IASTED International Conference on Circuits and
Systems (CS 2008)
-------------------------------------------------------------------------------------------------------------------------------------
The IASTED International Conference on Circuits and Systems (CS 2008)
will take place in
Kailua-Kona, Hawaii, USA, August 18-20, 2008.
URL: http://www.iasted.org/conferences/cfp-625.html.
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