Dear all

when I compile my code I see the following lines:

main-goodformat2.f90(71): (col. 7) remark: BLOCK WAS VECTORIZED.
main-goodformat2.f90(71): (col. 7) remark: BLOCK WAS VECTORIZED.
main-goodformat2.f90(82): (col. 8) remark: BLOCK WAS VECTORIZED.
main-goodformat2.f90(82): (col. 8) remark: BLOCK WAS VECTORIZED.
main-goodformat2.f90(143): (col. 7) remark: BLOCK WAS VECTORIZED.
main-goodformat2.f90(144): (col. 7) remark: BLOCK WAS VECTORIZED.
main-goodformat2.f90(144): (col. 7) remark: BLOCK WAS VECTORIZED.
main-goodformat2.f90(147): (col. 7) remark: BLOCK WAS VECTORIZED.

Can these lines cause error in the result?
Best,
Fatemeh

Fatemeh wrote:

No - they are optimization information messages from the compiler
letting you know that it figured out it could use vector instructions to
perform as many as four operations in one instruction. That they appear
by default is somewhat historical.

Steve Lionel wrote:
(snip)

Since some optimizations can generate different results,
it does seem worth asking about.
(snip)

SSE2 instead of x87, or something else?

If you compare to x87 code with intermediate results in
the 80 bit registers (64 bit significand) then the results
might be different. There is a discussion on another list on
the advantages of extra precision in floating point products.

glen herrmannsfeldt wrote:

The new default on IA-32 is the equivalent of -xW (/QxW) which tells the
compiler to use SSE and SSE2 instructions instead of x87. And you're
right that this can cause different results, though they will be more
consistent than with x87, which has been a constant source of user
complaints that I've seen for the past 11 years.

We're doing this as part of our attempt to improve the "out of the box
experience" for the typical user who tends not to look for optimization
switches. Another thing we have done is (finally!) add an "optimize for
host" capability (-xHost, /QxHost), something the DEC/Compaq compilers
had. Not only will this choose an appropriate mode for Intel
processors, but it will query the claimed SSE capabilities for non-Intel
processors and choose an appropriate mode (generic, SSE2 or SSE3) for
them as well.