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Author: jackojacko Date: Aug 1, 2008 09:49
Hi
I am designing a newr, better, faster and more forth processor, BSD
still. At present I have defined the instruction set architecture. Let
me know wht you think of it
http://code.google.com/p/nibz/wiki/InstructionSet
Have I missed anything, dont say conditional branch as EXE will do
that.
Chhers
jacko
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Author: rickmanrickman Date: Aug 1, 2008 10:23
On Aug 1, 12:49 pm, jacko gmail.com> wrote:> Hi
>
> I am designing a newr, better, faster and more forth processor, BSD
> still. At present I have defined the instruction set architecture. Let
> me know wht you think of it
>
> http://code.google.com/p/nibz/wiki/InstructionSet
>
> Have I missed anything, dont say conditional branch as EXE will do
> that.
I can't say that I understand how this machine is "better" than any
other processor. Can you explain a bit of how you decided this was
the right instruction set?
Rick
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Author: spamspam Date: Aug 1, 2008 13:10
On Fri, 1 Aug 2008, jacko wrote:
...
Would it hurt to add a memory set and a memory to memory MOVE
instruction?
Just wondering?
Cheers,
Rob.
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Author: jackojacko Date: Aug 2, 2008 05:29
> On Fri, 1 Aug 2008, jacko wrote:
>
> ...
>
>
>> Have I missed anything, dont say conditional branch as EXE will do
>> that.
>
>> Chhers
>
>> jacko
>
> Would it hurt to add a memory set and a memory to memory MOVE
> instruction?
>
> Just wondering?
> Cheers,
> Rob. ...
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Author: jackojacko Date: Aug 2, 2008 05:32
On 1 Aug, 18:23, rickman gmail.com> wrote:> On Aug 1, 12:49 pm, jacko gmail.com> wrote:
>>> Hi
>
>> I am designing a newr, better, faster and more forth processor, BSD
>> still. At present I have defined the instruction set architecture. Let
>> me know wht you think of it
>
>
>> Have I missed anything, dont say conditional branch as EXE will do
>> that.
>
> I can't say that I understand how this machine is "better" than any
> other processor. Can you explain a bit of how you decided this was
> the right instruction set?
>
> Rick
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Author: rickmanrickman Date: Aug 2, 2008 06:27
On Aug 2, 8:29 am, jacko gmail.com> wrote:>> On Fri, 1 Aug 2008, jacko wrote:
>
>> ...
>
>
>>> Have I missed anything, dont say conditional branch as EXE will do
>>> that.
>
>>> Chhers
>
>>> jacko
>
>> Would it hurt to add a memory set and a memory to memory MOVE
>> instruction? ...
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Author: jackojacko Date: Aug 2, 2008 06:31
Its a pssible instruction set 1 cycle per instruction. having such a
small processor concept many ahve many advantages if the processor is
interleaved with the multiplexer layers of memory decode. Weather the
limit of 1 processor per memory cell is efficient?
Bust code running in two differing locations (P) could multihread. A
branch outside the thread would cause a register set transfer request
up or down in memory.
cheers
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Author: jackojacko Date: Aug 2, 2008 08:52
On 2 Aug, 14:27, rickman gmail.com> wrote:> On Aug 2, 8:29 am, jacko gmail.com> wrote:
Gave all instructions mono sylable voiced names.
>
>>> On Fri, 1 Aug 2008, jacko wrote:
>
>>> ...
>
>
>>>> Have I missed anything, dont say...
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Author: rickmanrickman Date: Aug 2, 2008 10:12
On Aug 2, 11:52 am, jacko gmail.com> wrote:> On 2 Aug, 14:27, rickman gmail.com> wrote:
>>> If you don't consider the actual instruction set before you start
>> designing the CPU, you may well be optimizing a lot of instructions
>> that are not often used.
>
> This is the point, there is no optimizing of the instructions now,
> only combinations. The instructions if made simpler cease to be turing
> complete. Also if you are writing dense threaded code then the call
> instruction is most critical, and sorted.
>
> I would be interested to know if there are any other 16 op instruction
> sets that are no-indirection or single indirection (1 cycle fetch + 1
> cycle execute), which have under 8 full width registers, and a double
> accumulator.
I created one a few years ago with the goals of implementation
completely within in an FPGA, minimizing resources used and supporting
Forth easily. Minimization included both the logic and the program...
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Author: jackojacko Date: Aug 2, 2008 10:35
Got ya.
RO BA SI = DO so this gives me another free operation.
cheers will work on it.
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