http://arstechnica.com/articles/paedia/cpu/MIT-startup-raises-multicore-bar-with...

-marcel

On Aug 20, 2:36 pm, m...@iae.nl (Marcel Hendrix) wrote:

Hahaha, what a breakthrough in multicore technology!

Regards
Jean-Francois Michaud

Jean-François Michaud wrote:

Feel free to explain your comment.

According to the article, they are SHIPPING a 64-core processor. And if
nothing else, THAT alone is perhaps the most significant part of the
article. I just checked the IntellaSys site to see if there was any
news about them shipping, and the only changes I see are that there is
now a Upstate New York manufacturer's representative (which means I
might finally be able to get some real information) and that Jeff Fox's
name no longer appears where it did under "About."

Mentioned also is that the design of the TILE64 is based on work dating
back 10 years and is based on a VLIW design.

Regardless, the architecture they describe is completely different, far
more regular, and it has some really compelling hardware support built
in (two DDR2 controllers, two 10 gigabit Ethernet ports, two four-lane
PCIe interfaces). There isn't much detail on the individual processors,
but it looks like it can /directly/ address far more memory than the
IntellaSys chips.

John Passaniti wrote:

Jerry Avins wrote:

Wow, that's an amazingly generous interpretation.

John Passaniti JapanIsShinto.com> writes Re: Sounds familiar
[..]

[..]

Now *this* is a chip I would have fun designing a new Forth for to scorch
the paint of the walls with!

The chip itself costs $435, which is not much, given the spec. However,
for a development system one probably needs to add a couple of zeros on
the wrong side of the decimal point.

-marcel

On Aug 20, 9:09 pm, John Passaniti h...@JapanIsShinto.com> wrote:

Yes, each core has a 64K L2 cache and a mechanism to share caches of
other cores before resorting to off-chip access. You could run a lot
of Forth in 64K without ever having to go off-chip.

I think the trend with these sea-of-processors chips is for memory to
become more valuable as off-chip access becomes a bottleneck. The
cache sharing thing lets a core run bloatware at the expense of other
cores.

In other words, compactness pays because you can have more CPU cores
doing useful work given a fixed amount of on-chip memory. It's nice to
see trends favor Forth for a change.

Brad

Marcel Hendrix wrote:

I can't see why. All you need is a board with interconnections for the
interfaces and power supply, and that's it. Add some RAM, a hard disk
controller and a graphics card, and ready is your 64 core PC booting Linux
(they say they have a Linux port for it ready).

On Aug 20, 9:09 pm, John Passaniti h...@JapanIsShinto.com> wrote:

Jean-François Michaud wrote:

Well, they probably think that 2 10GB Ethernet interfaces are sufficient to
build a cluster of these processors - no need to have a more direct
connection interface. Any off-chip communication is way more bulky than the
on-chip communication, anyway, and the price level is high enough to afford
a switch for clustering several chips together (it's not a $20 chip, it's a
$400+ chip).